What PCB Autorouters Get Wrong, and How to Make One Finish Your Board

People searching for a free PCB autorouter have usually just been failed by one. I work on Sadie, the autorouter inside PCBEditor, a browser PCB editor, so take my view with that in mind. Here is what an autorouter should do, what Sadie handles, what every autorouter gets wrong, and the board where ours did not finish.

Short answer: an autorouter turns the connections in your schematic into copper, across the layers you give it, against your board's design rules. A good one keeps going on hard nets, sizes controlled-impedance traces to your stackup, and names every net it could not finish. No router fixes a bad placement, so when one fails, look at where the parts sit before you blame the router.

What a good autorouter does

Multi-layer, and it keeps going. Sadie routes across two to sixteen copper layers. When a net is hard to complete, she reworks the routing around it rather than giving up on that net and leaving it to you.

Every net to its class. Trace width, clearance and via sizes come from the net class each net belongs to, so a supply in a power class and an I²C line in the default class are not routed the same way. Through, blind, buried and microvias are used only where the class allows them.

Impedance targets. Give a net class an impedance target and its trace width is worked out from your stackup. Sadie keeps those nets on layers where that width meets the target, and her check flags any net that misses it.

It tells you what it could not route. Every run ends with a design check. If four nets are unrouted you get those four net names, not a completion percentage. An autorouter that reports success while leaving nets open is worse than one that fails loudly.

Net classes in the Fab tab. Each class sets its trace width, clearance, differential pair and impedance target, shows the impedance its width gives on the stackup (136.8 Ω on F.Cu here, with no target set) and lists its nets. Via classes sit underneath.

The harder parts, and what Sadie does with them

Differential pairs. A pair you declare is routed as a pair: both traces side by side at the gap the class sets. If they still differ in length by more than the class's tolerance, she adds a meander to the shorter one.

Dense BGAs and fine-pitch parts. Inner balls of a dense ball-grid array (1.27 mm pitch and finer) get a via in the pad down to a free signal layer, spread over several layers so no one layer runs out of room. A fine-pitch pad boxed in by its neighbours leaves through a via in its own pad, and the chat tells you what that means for your order: "For ordering: 5 vias sit in pads, so ask for filled and capped vias (IPC-4761 type VII)."

Planes and pours. On a board with plane layers, each power and ground pad drops to its plane through a via beside or inside the pad. On a two-layer board, the ground pour is filled around the routed signals and tied together, and copper islands are removed.

Odd shapes and single-sided boards. Custom outlines, cutouts and keepout areas are respected with the board's edge clearance. For a single-sided board, where one trace has to cross another, Sadie bridges it with a 0 Ω link added to the board as a part.

Rounded corners, if you want them. Choose Rounded under Trace corners in the Router tab and every corner with room becomes a smooth arc, held to the same rules. Pads, vias, pair members and length-matched nets keep their corners.

What it checks

Routing is a search through physical space against hard constraints. Whether this trace clears that pad by 0.15 mm is a measurement, not a judgement. So the router also measures the board: clearances between traces, pads, vias and pours; holes to copper and hole to hole; copper to the edge and inside keepouts; minimum widths, drills, via sizes and annular rings; aspect ratio and microvia stacking; unconnected pads, floating copper and dangling traces; and pair gap, length and impedance where a class sets them.

Each finding says what is wrong and by how much, for example "trace to pad U1.7 (0.100mm < 0.127mm)", and it checks copper you drew by hand the same way.

The board it did not finish

This is an RP2040 development board on four layers: the RP2040 in its fine-pitch QFN, 2 MB of QSPI flash, a crystal, USB-C and two 20-pin headers. 33 parts on 70.2 × 50.8 mm.

The RP2040 board on four layers, 70.2 × 50.8 mm: 13 connections on 9 nets still unrouted (the badge top right and the status bar). The request to connect GPIO26 to GPIO29 left the board unchanged, and the editor offered a larger board or a fresh placement instead.

The run ended with 9 nets unrouted and two design-rule errors, and it said so, by name. A later request to connect GPIO26 to GPIO29 was discarded rather than break the copper that was already there. The export held back the Gerbers. That is what a failure should look like: you know exactly what is open, and nothing half-finished goes to the fab.

What autorouters get wrong

Placement matters more than the router. Most unroutable boards are placement problems. If two connectors sit at opposite corners with a dense IC between them, no router recovers that. Sadie names the nets she could not reach so you know what to move. On the RP2040 board, the fixes on offer were exactly that: more board area or a fresh placement.

Dense fine-pitch boards are the hard case. A dense four-layer board around a large BGA or a fine-pitch microcontroller is where you are most likely to see unrouted nets today. This is the area we are actively working on.

Automatic is not always right. Analogue feedback paths, sensitive high-speed pairs and current-carrying power runs are often worth routing by hand. Route those first, then route only the open nets, which keeps every trace you drew. A full re-route is different: it deletes the existing copper and starts again, so the editor asks before it does that.

A 555 flasher during an edit. The change touched three nets, so only those three were rerouted, and the rest of the copper stayed where it was.

Using it

1. Open a board: describe a circuit, import Gerbers, or draw one in Blank Studio.
2. Place the parts, or accept the generated placement.
3. Set net classes in the Fab tab: widths, clearances, pairs and impedance targets.
4. Route any critical nets by hand first if you have them.
5. Run Auto-route, then Run DRC and read the unrouted list.
6. Export Gerber, drill, pick-and-place and BOM.

It runs in the browser on a board you already have, with no install and no per-seat licence, and it is free to start: the free plan includes Sadie routes, and paid plans route every board with her. The page this post is based on is at pcbeditor.com/free-pcb-autorouter.

Which autorouter has failed you, and on what? I'm most interested in the boards where the router got blamed for a placement problem, or the other way round.